• May 27, 2016 News!The submission for Special Issue is officially open now!   [Click]
  • May 03, 2016 News!Vol.6, No.6 has been indexed by EI (Inspec).   [Click]
  • Mar 17, 2017 News!Vol.9, No.2 has been published with online version. 13 peer reviewed articles from 4 specific areas are published in this issue.   [Click]
General Information
Editor-in-chief
Prof. Wael Badawy
Department of Computing and Information Systems Umm Al Qura University, Canada
I'm happy to take on the position of editor in chief of IJCTE. We encourage authors to submit papers concerning any branch of computer theory and engineering.
IJCTE 2010 Vol.2(4): 608-612 ISSN: 1793-8201
DOI: 10.7763/IJCTE.2010.V2.210

CAD Design of Operational Amplifiers with Noise Power Balance for SoC Application

B. K. Mishra and Sandhya Save

Abstract—Advances in integrated circuit technology have led to the birth and proliferation of a wide variety of integrate dcircuits, including but not limited to application specific integrated circuits(ASIC), various types of microcontrollers and processors. Many applications such as communication devices (VoIP, MoIP, wireless) require chip speeds that may be unattainable with separate IC products. Creating portable analog modules requires the system to capture not only the sized schematic of the circuit but also the objectives that circuitis trying to achieved. This paper applies the embedding knowledge into pure simulation based methodology to perform automatic analog intergraded circuit design, synthesis and optimization in order to reduce development time of this kind of circuits. A practical platform independent computer aided design methodology for synthesis of (analog circuits) Operational Amplifier with flexible noise –power balance is presented in this paper. In order to evaluate the fitness of the circuit specifications in any iteration of SA, NGSPICE simulation is used. The simulation results confirm the efficiency of presented methodology in determining the device sizes in analog circuits.

Index Terms—Analog circuit designs methodologies, Analog design automation, ASIC, CAD, EDA tools, Op-amps, Simulated Annealing, SPICE, SoC, AMS.

Dr. B. K. Mishra, Principal, Thakur college of Engg. & Tech. India. (email : drbk.mishra@thakureducation.org).
Sandhya S. Save, Asst. Professor, Thakur college of Engg. & Tech. India. (E-mail : sandhya.save@thakureducation.org).

[PDF]

Cite: B. K. Mishra and Sandhya Save, "CAD Design of Operational Amplifiers with Noise Power Balance for SoC Application," International Journal of Computer Theory and Engineering vol. 2, no. 4, pp. 608-612, 2010.  

Copyright © 2008-2015. International Journal of Computer Theory and Engineering. All rights reserved.
E-mail: ijcte@vip.163.com