International Journal of Computer Theory and Engineering

Editor-In-Chief: Prof. Mehmet Sahinoglu
Frequency: Quarterly
ISSN: 1793-8201 (Print), 2972-4511 (Online)
Publisher:IACSIT Press

OPEN ACCESS
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CiteScore

IJIET 2015 Vol.7(1): 57-61
doi: 10.7763/IJCTE.2015.V7.930

An Architecture for Measuring Network Performance in Multi-Core Multi-Cluster Architecture (MCMCA)

Norhazlina Hamid , Robert J. Walters , Gary B. Wills

  • School of Electronics & Computer Science, University of Southampton, SO17 1BJ, United Kingdom.

Abstract

The aim of this research is to design a new architecture for large-scale clusters to improve the communication within the interconnection network to gain higher performance. The new architecture will be based on clusters built using workstations containing multi-cored processors in a multi- cluster architecture in the presence of uniform traffic. Multi- core technology is proposed to achieve higher performance without driving up power consumption and heat, which is the main concern in a single-core processor. The architecture will avoid congestion and deadlocks in the network to guarantee faster message transmission. The architecture performance will be validated through simulation, experimental and measurements under various working conditions.

Keywords

  • HPC
  • multi-core cluster
  • multi-cluster
  • interconnection network
  • performance
930-AC0023

How to Cite

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Norhazlina Hamid, Robert J. Walters, and Gary B. Wills, "An Architecture for Measuring Network Performance in Multi-Core Multi-Cluster Architecture (MCMCA)," International Journal of Computer Theory and Engineering, vol. 7, no. 1, pp. 57-61, 2015. https://doi.org/10.7763/IJCTE.2015.V7.930

Copyright & License

Copyright © 2015 by the authors. This is an open access article distributed under the Creative Commons Attribution License which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited (CC BY 4.0).

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