Abstract—The presented work deals an ultra high-speed CMOS 4-2 compressor which is an essential part in fast digital arithmetic integrated circuits. Current-mode techniques have been used to improve the overall performance of the compressor. New fully differential proposed circuit improves delay to less than 37% also reduces occupied area in comparison to other high-speed conventional compressor circuits. To evaluate the performance of the proposed circuit, conventional gate level structure has been chosen and all of the circuits have been simulated in 65-nm IBM CMOS process with 1.2V power supply voltage.
Index Terms—Digital logic, 4-2 compressor, CMOS, high speed, current-mode.
P. Aliparast is with the Department of Electrical Engineering, Heris Branch, Islamic Azad University, Heris, Iran and the Faculty of Electrical and Computer Engineering, University of Tabriz, Tabriz, Iran (e-mail: p-aliparast@ tabrizu.ac.ir).
Z. D. Koozehkanani is with the Faculty of Electrical and Computer Engineering, University of Tabriz, Tabriz, Iran (e-mail: zdaie@tabrizu.ac.ir).
Farhad Nazari is with the Department of Electrical Engineering, Heris Branch, Islamic Azad University, Heris, Iran (e-mail: farhaad.nazari@herisiau.ac.ir).
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Cite:Peiman Aliparast, Ziaadin D. Koozehkanani, and Farhad Nazari, "An Ultra High Speed Digital 4-2 Compressor in 65-nm CMOS," International Journal of Computer Theory and Engineering vol. 5, no. 4, pp. 593-597, 2013.