doi: 10.7763/IJCTE.2013.V5.756
An Ultra High Speed Digital 4-2 Compressor in 65-nm CMOS
Peiman Aliparast
,
Ziaadin D. Koozehkanani ,
Farhad Nazari
- Department of Electrical Engineering, Heris Branch, Islamic Azad University, Heris, Iran and the Faculty of Electrical and Computer Engineering, University of Tabriz, Tabriz, Iran.
Abstract
The presented work deals an ultra high-speed CMOS 4-2 compressor which is an essential part in fast digital arithmetic integrated circuits. Current-mode techniques have been used to improve the overall performance of the compressor. New fully differential proposed circuit improves delay to less than 37% also reduces occupied area in comparison to other high-speed conventional compressor circuits. To evaluate the performance of the proposed circuit, conventional gate level structure has been chosen and all of the circuits have been simulated in 65-nm IBM CMOS process with 1.2V power supply voltage.
Keywords
- Digital logic
- 4-2 compressor
- CMOS
- high speed
- current-mode
How to Cite
Peiman Aliparast, Ziaadin D. Koozehkanani, and Farhad Nazari, "An Ultra High Speed Digital 4-2 Compressor in 65-nm CMOS," International Journal of Computer Theory and Engineering, vol. 5, no. 4, pp. 593-597, 2013. https://doi.org/10.7763/IJCTE.2013.V5.756
Copyright & License
Copyright © 2013 by the authors. This is an open access article distributed under the Creative Commons Attribution License which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited (CC BY 4.0).