doi: 10.7763/IJCTE.2013.V5.750
Logic Circuit Design Based on Series-Connected CMOS-NDR Circuit
Kwang-Jow Gan1
,
Zhen-Kai Kao2 ,
Cher-Shiung Tsai3 ,
Din-Yuen Chan2 ,
Jian-Syong Huang2
- 1Department of Electrical Engineering, National Chia-Yi University, No. 300 Syuefu Rd, Chiayi City 60004, Taiwan, ROC.
- 2Institute of Computer Science and Information Engineering, National Chia-Yi University, No. 300 Syuefu Rd, Chiayi City 60004, Taiwan, ROC.
- 3Department of Electrical Engineering, Kun Shan University, 949 Da-Wan Rd, Yung-Kang City, Tainan Hsien 71003, Taiwan, ROC.
Abstract
In this paper, we propose a MOS-BJT-NDR circuit, which can show the negative-differential-resistance (NDR) characteristic in its current-voltage (I-V) curve. This NDR circuit is composed of standard Si-based metal-oxide-semiconductor field-effect transistor (MOS) and bipolar junction transistor (BJT). Therefore, we can implement the applications using the standard CMOS process. We demonstrate the design of some logic circuits using the series-connected CMOS-NDR circuit based on the monostable-bistable transition logic element (MOBILE) theory. This logic circuit is designed based on the standard 0.18 μm CMOS process.
Keywords
- CMOS process
- logic circuit
- monostable–bistable transition logic element (MOBILE)
- negative-differential-resistance
How to Cite
Kwang-Jow Gan, Zhen-Kai Kao, Cher-Shiung Tsai, Din-Yuen Chan, and Jian-Syong Huang, "Logic Circuit Design Based on Series-Connected CMOS-NDR Circuit," International Journal of Computer Theory and Engineering, vol. 5, no. 3, pp. 562-566, 2013. https://doi.org/10.7763/IJCTE.2013.V5.750
Copyright & License
Copyright © 2013 by the authors. This is an open access article distributed under the Creative Commons Attribution License which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited (CC BY 4.0).