General Information
    • ISSN: 1793-8201 (Print), 2972-4511 (Online)
    • Abbreviated Title: Int. J. Comput. Theory Eng.
    • Frequency: Quarterly
    • DOI: 10.7763/IJCTE
    • Editor-in-Chief: Prof. Mehmet Sahinoglu
    • Associate Editor-in-Chief: Assoc. Prof. Alberto Arteta, Assoc. Prof. Engin Maşazade
    • Managing Editor: Ms. Cecilia Xie
    • Abstracting/Indexing: Scopus (Since 2022), INSPEC (IET), CNKI,  Google Scholar, EBSCO, etc.
    • Average Days from Submission to Acceptance: 192 days
    • APC: 800 USD
    • E-mail: editor@ijcte.org
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IJCTE 2015 Vol.7(3): 172-176 ISSN: 1793-8201
DOI: 10.7763/IJCTE.2015.V7.951

Low Power Circuit Design Techniques: A Survey

Nikhil Raj, Ashutosh Kumar Singh, and Anil Kumar Gupta

Abstract—This paper presents a detail on various techniques to realize low voltage low power circuit. The techniques discussed are conventional gate-driven (GD), floating gate (FG), quasi-floating gate (QFG), bulk-driven (BD), and BD-QFG. The comparative analysis results in best performance achieved by BD-QFG approach. As BD circuits are well known approach for low power design, the combined effect QFG in bulk driven circuit results in enhanced performance. The complete analysis has been carried out in industry specific node UMC 0.18 micron technology with the help of HSpice simulator.

Index Terms—Quasi-floating gate, bulk-driven, bandwidth, power.

Nikhil Raj, Ashutosh Kumar Singh, and Anil Kumar Gupta are with the National Institute of Technology, Kurukshetra, Haryana, India (e-mail: nikhilpub@gmail.com, ashutosh@nitkkr.ac.in, akgupta@nitkkr.ac.in).

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Cite:Nikhil Raj, Ashutosh Kumar Singh, and Anil Kumar Gupta, "Low Power Circuit Design Techniques: A Survey," International Journal of Computer Theory and Engineering vol. 7, no. 3, pp. 172-176, 2015.


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