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General Information
Editor-in-chief
Prof. Wael Badawy
Department of Computing and Information Systems Umm Al Qura University, Canada
I'm happy to take on the position of editor in chief of IJCTE. We encourage authors to submit papers concerning any branch of computer theory and engineering.
IJCTE 2012 Vol.4(1): 85-92 ISSN: 1793-8201
DOI: 10.7763/IJCTE.2012.V4.430

Routing Algorithms, Process Model for Quality of Services (QoS) and Architectures for Two-Dimensional 4´4 Mesh Topology Network-on-Chip

Nauman Jalil, Adnan Qureshi, Furqan Khan, and Sohaib Ayyaz Qazi

Abstract—In this paper we have provided routing algorithms, process model for quality of service (QoS) and architecture for new Timer based adaptive routing algorithm for a generic network, based on a two-dimensional mesh topology. Compared to previous work, our proposed work has provided with details of routing algorithms and process model for four class of services used in on-chip networks. The QoS requirements (delay and throughput) for each class of service has met for deterministic XY wormhole routing and further improved for by Timer based adaptive routing algorithm. Simulation results show the improvement achieved by Timer based adaptive routing algorithm as compared to deterministic XY wormhole routing which is based on shortest path.

Index Terms—Networks-on-Chip (NoC), System-on-Chip (SoC), On-Chip Communication, Quality of Service (QoS)

The authors are with the Department of Electrical Engineering, CASE University, Islamabad, Pakistan (e-mail: nauman_jaleel@yahoo.com).

[PDF]

Cite: Nauman Jalil, Adnan Qureshi, Furqan Khan, and Sohaib Ayyaz Qazi, "Routing Algorithms, Process Model for Quality of Services (QoS) and Architectures for Two-Dimensional 4´4 Mesh Topology Network-on-Chip," International Journal of Computer Theory and Engineering vol. 4, no. 1, pp. 85-92, 2012.

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