Abstract—The aim of this research is to design a new architecture
for large-scale clusters to improve the communication
within the interconnection network to gain higher performance.
The new architecture will be based on clusters built using
workstations containing multi-cored processors in a multi-
cluster architecture in the presence of uniform traffic. Multi-
core technology is proposed to achieve higher performance
without driving up power consumption and heat, which is the
main concern in a single-core processor. The architecture will
avoid congestion and deadlocks in the network to guarantee
faster message transmission. The architecture performance will
be validated through simulation, experimental and measurements
under various working conditions.
Index Terms—HPC, multi-core cluster, multi-cluster, interconnection
network, performance.
The authors are with the School of Electronics & Computer Science,
University of Southampton, SO17 1BJ, United Kingdom (e-mail:
nh3g11@ecs.soton.ac.uk, rjw1@ecs.soton.ac.uk, gbw@ecs.soton.ac.uk).
[PDF]
Cite:Norhazlina Hamid, Robert J. Walters, and Gary B. Wills, "An Architecture for Measuring Network Performance in Multi-Core Multi-Cluster Architecture (MCMCA)," International Journal of Computer Theory and Engineering vol. 7, no. 1, pp. 57-61, 2015.
