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General Information
Editor-in-chief
Prof. Wael Badawy
Department of Computing and Information Systems Umm Al Qura University, Canada
I'm happy to take on the position of editor in chief of IJCTE. We encourage authors to submit papers concerning any branch of computer theory and engineering.
IJCTE 2013 Vol.5(3): 551-556 ISSN: 1793-8201
DOI: 10.7763/IJCTE.2013.V5.748

Register File Customization for Embedded Multi-Threaded Pipelined Processors

Ran Zhang, Hui Guo, and Shivam Garg
Abstract—Multi-threading pipelined processor design enables high performance of a single processor core by exploiting both thread-level and instruction-level parallelism. However, when it is applied to embedded systems, its demanding for large register file, hence high resource overhead and energy consumption, becomes a big issue. In this paper, we propose a customization approach to reduce register file by maximally utilizing each of the registers used. The experiments on several applications demonstrate that with our approach, the register file for a single thread can be reduced by about 50%, based on which the multi-threading processor can achieve high performance while at low energy consumption - with 17-28% throughput improvement and 20% energy reduction when compared to the single-threading processor design.

Index Terms—Register file customization, multithread pipeline, energy-aware design.

The authors are with the School of Computer Science and Engineering, The University of New South Wales, Sydney, Australia (e-mail: {ranz, huig, shivam.garg}@cse.unsw.edu.au).

[PDF]

Cite:Ran Zhang, Hui Guo, and Shivam Garg, "Register File Customization for Embedded Multi-Threaded Pipelined Processors," International Journal of Computer Theory and Engineering vol. 5, no. 3, pp. 551-556, 2013.

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